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IBM POWER architecture

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IBM POWER is a specialized instruction set architecture (ISA) developed by IBM. An ISA is a set of rules that tells a computer's processor how to follow instructions. The name POWER is an acronym for Performance Optimization With Enhanced RISC. This architecture was designed to power high-end microprocessors during the early 1990s. IBM used these processors in many different types of machines. These included servers, workstations, minicomputers, and even massive supercomputers.

POWERhistoryfamilydiagram
POWERhistoryfamilydiagram

At the heart of this system is a design philosophy called RISC. RISC stands for reduced instruction set computer. In a RISC system, the computer uses many simple instructions instead of a few complex ones. Each instruction is designed to complete in the same constant amount of time. This makes the processor very predictable and efficient. The original POWER design was a direct descendant of the 801 project. The 801 was considered the first true RISC processor design. It focused on simple tasks like moving data between memory and registers. It also focused on performing basic math and managing branches in code.

To make these processors even faster, IBM developed superscalar designs. A superscalar processor can handle multiple instructions during a single clock cycle. This happens because the chip has different execution units working at once. For example, the chip might have an integer unit and a floating-point unit. The instruction decoder acts like a traffic controller. It can fetch one instruction and decode another at the same time. It can then send one instruction to the integer unit and another to the floating-point unit. This allows the computer to do several different tasks simultaneously.

PowerISA-evolution
PowerISA-evolution

The history of POWER began with the 801 research project in 1974. IBM originally wanted to build a large telephone-switching network. This network needed to handle at least 300 calls per second. Engineers estimated that each call would require 20,000 machine instructions. To maintain a real-time response, the processor needed a performance of 12 MIPS. Although the telephone project was canceled in 1975, the 801 design was very promising. Researchers at the Thomas J. Watson Research Center continued to study it. They explored how to use multiple functional units to improve performance. This research led to the Cheetah project in 1982. This project tested if a RISC machine could maintain multiple instructions per cycle.

In 1990, IBM introduced the first computers using the POWER instruction set. These were known as the RISC System/6000, or RS/6000. They were divided into two main classes: workstations and servers. These were marketed as the POWERstation and the POWERserver. The original POWER1 CPU had two main configurations. The RIOS-1 configuration used 10 discrete chips to handle different tasks. These included an instruction cache chip and a floating-point chip. The lower-cost RIOS.9 configuration used only 8 discrete chips. By 1992, IBM also released a single-chip version called RSC for lower-end machines.

IBM later developed the POWER2 processor to succeed the POWER1. This new design added a second fixed-point unit and a second floating-point unit. It also introduced new instructions, such as hardware square root instructions. In 1996, IBM created the P2SC, which stands for POWER2 Super Chip. This was a single-chip version of the POWER2 architecture. It combined all the separate chips from the original design onto one huge die. At the time, the P2SC was the largest processor in the industry by transistor count. This chip was used in the 1997 IBM Deep Blue supercomputer. Deep Blue used this technology to defeat the chess grandmaster Garry Kasparov.

The POWER architecture has continued to evolve through several stages. In 1998, IBM introduced the POWER3 processor. This was mainly a 32/64-bit PowerPC processor. It included POWER architecture features so it could remain backwards compatible. Eventually, the original IBM POWER architecture was abandoned as the PowerPC design took over. The PowerPC architecture later evolved into the Power ISA in 2006.

PowerISA-evolution
PowerISA-evolution

Even today, IBM develops PowerPC microprocessor cores. These are often embedded in application-specific integrated circuits (ASICs) for high-volume uses. The journey from a telephone switch project to modern computing shows how simple instruction rules can change the world.

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