CMOS

Complementary metal–oxide–semiconductor, or CMOS, is a specialized method for making integrated circuit chips. These chips act as the brains for many digital devices, including microprocessors, microcontrollers, and memory chips. Today, CMOS is the industry standard for manufacturing semiconductor devices. In fact, about 99% of all integrated circuits are made using CMOS technology. This includes most digital, analog, and mixed-signal circuits.

The technology relies on a specific physical structure known as a metal–oxide–semiconductor field-effect transistor, or MOSFET. The name describes how the device is built: a metal gate electrode sits on top of an oxide insulator. This insulator is then placed on top of a semiconductor material. While aluminum was used for the metal gates in the past, manufacturers now use polysilicon. For very small chips, such as those at the 45 nanometer node or smaller, companies like IBM and Intel use high-κ dielectric materials to improve the process.

CMOS works by using complementary and symmetrical pairs of transistors. These pairs consist of p-type (PMOS) and n-type (NMOS) MOSFETs. In a CMOS circuit, these two types work together to perform logic functions. The PMOS transistor creates low resistance between its source and drain when a low gate voltage is applied. Conversely, it creates high resistance when a high gate voltage is applied. The NMOS transistors work in a similar complementary fashion.

This complementary design provides two major benefits: high noise immunity and very low static power consumption. Because one transistor in the pair is always in the "off" state, the circuit only draws significant power during the brief moment it switches between states. This is very different from older technologies like NMOS or transistor–transistor logic (TTL). Those older methods have a standing current even when they are not changing states. Because CMOS produces much less waste heat, engineers can pack a very high density of logic functions onto a single chip.

The history of CMOS is built on many different scientific breakthroughs. In 1948, John Bardeen and Walter Brattain patented an insulated-gate transistor (IGFET) featuring an inversion layer. This concept of an inversion layer remains the foundation of modern CMOS. In 1955, Carl Frosch and Lincoln Derick discovered that growing silicon dioxide over a silicon wafer provided surface passivation. This helped protect the wafer from heat and impurities. Later, in 1963, Frank Wanlass and Chih-Tang Sah of Fairchild Semiconductor presented the CMOS process. Wanlass received a US patent for CMOS circuitry in 1967.

While CMOS was initially overlooked by the American semiconductor industry in favor of NMOS, it eventually became the dominant process in the 1980s. In 1978, a Hitachi research team led by Toshiaki Masuhara introduced the twin-well Hi-CMOS process. This was a turning point because it allowed CMOS to match the speed of NMOS while using far less power. For example, the Hitachi HM6147 chip used only 15mA of power. In comparison, the Intel 2147 HMOS chip used 110mA for a similar task. This efficiency allowed CMOS to overtake NMOS for computer manufacturing.

CMOS technology has been used in many famous applications throughout history. The first mass-produced consumer electronic product to use CMOS was the Hamilton Pulsar "Wrist Computer" digital watch in 1970. Because of its low power needs, it became a popular choice for calculators and quartz watches. In 1989, NASA used an RCA 1802 CMOS microprocessor for the Galileo spacecraft sent to Jupiter. Today, CMOS is used for much more than just logic. It is used in analog circuits like CMOS image sensors, RF circuits, and data converters.

As technology advances, the way we make CMOS continues to change. In the late 1980s, Bijan Davari at IBM developed high-performance, low-voltage CMOS. This helped enable the creation of portable, battery-powered handheld electronics. Since the year 2000, researchers have developed new techniques like atomic layer deposition and pitch double patterning to make even smaller chips. While planar CMOS is still common today, it is gradually being replaced by non-planar FinFET technology. This new method allows for the manufacturing of even smaller semiconductor nodes, specifically those smaller than 20nm.